We are hiring a Physical Design Engineer to contribute to advanced CPU design initiatives within a high-performance, fast-paced environment. This role focuses on delivering robust physical implementation aligned with stringent PPA targets. • Own critical CPU units from RTL-to-GDSII, covering synthesis, floorplanning, P&R, timing closure, and signoff • Perform feasibility studies by analyzing micro-architecture and optimizing PPA tradeoffs • Develop and refine physical design methodologies to improve implementation efficiency • Drive implementation across floorplanning, CTS, routing, extraction, PV (DRC/LVS), EM/IR, and signoff • Work with industry-standard tools including Fusion Compiler, Cadence PNR solutions, PrimeTime, StarRC, Calibre, and RedHawk Join a team where your physical design expertise directly influences performance, power, and silicon quality. Regards, Karthik Kumar [email protected]